A rewrite count in a highly-integrated, large-capacity non-volatile semiconductor storage device (memory) is finite. When accesses concentrate on a limited portion (address), the access-concentrated portion is degraded earlier than other portions to possibly become incapable of performing storing operation, leading to memory failure.
Related arts are disclosed in Japanese Laid-open Patent Publication No. 09-293386, Japanese Laid-open Patent Publication No. 2007-184072, Japanese Laid-open Patent Publication No. 2008-287803, Japanese Laid-open Patent Publication No. 2012-027991, U.S. Patent Application Publication No. 2012/0204071, and Moinuddin K. Qureshi, John Karidis, Michele Franceschini, Vijayalakshmi Srinivasan, Luis Lastras, and Bulent Abali, “Enhancing lifetime and security of PCM-based main memory with start-gap wear leveling”, Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO 42), 2009.